Memory has risen from 52% to 63% of total AI chip component costs between Q1 2024 and Q4 2025 while advanced packaging fell from 19% to 15%. Epoch data show HBM spending alone drove roughly $20 billion of the $30 billion increase in quarterly component spend. Total component expenditure reached an estimated $52 billion annualized rate by late 2025. Logic die share remained flat near 13-14%. HBM supply constraints now set the binding limit on wafer starts at TSMC and Samsung foundries. NVIDIA H100 and AMD MI300X designs illustrate the shift, each requiring 80-192 GB HBM3 stacks whose cost exceeds the combined logic and CoWoS spend. Roadmaps for Blackwell and MI350 extend this pattern, allocating larger reticle areas to memory tiles rather than compute. TSMC 2024 investor materials and Samsung Foundry briefings confirm HBM capacity additions lag logic wafer growth by 18-24 months. This cost inversion alters prior scaling assumptions that treated memory as a secondary BOM item.