High-resolution die imaging and automated extraction yielded the full 94720-bit 80386 microcode ROM binary, cross-checked against the 8086 precedent of 10752 bits. The microcode organizes into μ-ops with source/destination register fields, ALU second-operand selection, and end-of-instruction markers, interfaced to hardware accelerators for multiply, divide, barrel shift and protection tests. Decoding occurs via multiple smaller PLAs plus a protection-test PLA, producing 215 distinct entry points versus the 8086's 60. Entry points differentiate register versus memory operands, real versus protected mode, and REP prefix handling. Microcode primarily configures accelerators rather than implementing full algorithms, explaining the per-cycle speedup over the 8086. Ken Shirriff's die tracing confirmed signal connections between microcode fields and execution units.