Moertel’s 2013-12-14 6809 blit post gives 392-byte tiles and no frame times

Tom Moertel’s 2013-12-14 post reconstructs an unnamed 6809 side-scroller whose background blit dominated frame time. Each tile was 28 by 28 pixels at 4 bits per pixel: 14 bytes per row and 392 bytes per tile. The stated framebuffer was 320 by 240, 160 bytes per row, 38,400 bytes total. The posted inner copy was LDU,X++ then STU,Y++, seven word moves per row, using 6809 autoincrement indexing. The author wrote that loops were already unrolled. The post names neither the game, the CPU clock, nor the patch that followed.

One tile is 196 16-bit transfers (7 times 28). A full-frame byte rewrite is 19,200 such stores before fixups. After every 14-byte row the destination pointer must move 146 bytes (160 minus 14), 28 times per tile. Motorola’s M6809 Programming Manual (May 1981) defines indexed,R++ as post-increment by operand size, so the posted pair already advances both pointers while moving 4 pixels. It is not a one-cycle operation. At 2 MHz a 60 Hz frame holds about 33,000 cycles. Nineteen thousand multi-cycle stores do not fit. The memoir records no measured milliseconds.

The caveat is the part retellings drop. Moertel wrote that he may have remembered details wrong. His 2013-12-16 update sends readers to Hacker News and Proggit for corrections. The post still has no listing, no binary, and no before/after frame time. A 38,400-byte buffer is 58.6 percent of a 64 KiB address space, so a second buffer does not fit without banking. The writeup never mentions an MMU or a video-memory map. An optimization claim with no artifact cannot be checked against the instruction set that supposedly absorbed the cost.

The reusable fact is the arithmetic, not the missing punchline. Any further gain had to touch fewer bytes or remove the 146-byte row repair. The posted LDU/STU pair was already an autoincrement move, and the author said ordinary unrolling was done. Commodore’s Amiga Hardware Reference Manual (1985) specifies a blitter that copies and shifts bitplanes off the CPU. Later engines specialize copies by alignment and stride. That lineage does not verify this account. Without a dump or a cycle-accurate listing, the 2013 text is a memory-map calculation, not a deployment record.