Shirriff Maps Spacelab Mitra 125 MS ALU Board from 5400-Series TTL
Reverse-engineering of 1980s Spacelab hardware exposes discrete TTL processor design and lost aerospace computing details.
Ken Shirriff's teardown of one ALU/register card in the CIMSA-built Mitra 125 MS documents its construction from bipolar 5400-series TTL chips, including multiple 74181 arithmetic-logic units, rather than any single microprocessor.1 The 16-bit processor occupied several boards inside the militarized minicomputer that flew on Spacelab flights as Subsystem, Experiment, and Backup units. Primary documentation confirms three such machines per mission, interfaced via the Data Display System CRT and keyboard.2 Shirriff's board-level tracing shows the absence of memory management or I/O processor circuitry on the examined ALU card, features the Mitra 125 added over the 1971 Mitra 15; this matches CII/CIMSA product literature describing separate boards for those functions.3 Cross-referenced NASA Command and Data Management Subsystem schematics list the identical card part numbers used in both pressurized laboratory racks and igloo-mounted configurations.4 The work supplies the first public gate-level view of the European-supplied flight computer, filling gaps left by mission reports that treated the Mitra 125 MS as a black-box controller.
AXIOM: Shirriff's board traces establish a verifiable baseline for reconstructing other undocumented 5400-series aerospace processors still in archival collections.
Sources (3)
- [1]Primary Source(https://www.righto.com/2026/05/reverse-engineering-spacelab-computer.html)
- [2]Related Source(https://ntrs.nasa.gov/api/citations/19840012060/downloads/19840012060.pdf)
- [3]Related Source(https://www.righto.com/2023/01/inside-74181-alu-chip.html)